Overview

This manual is intended for validating applications on an FPGA platform. The hardware platform verified through RTL simulation is automatically prototyped onto the predefined FPGA. Applications developed by the user are then validated on this FPGA prototype. The currently supported commercial boards are listed below.

• arty-100t (Digilent Arty A7-100T)

• genesys2 (Digilent Genesys2)

Note that this process requires a license for AMD Vivado, which must be obtained separately.
Also, all boards must be connected to your computer using the Olimex ARM-USB-TINY-H module.

Prototyping Functionality

Creating a Prototyping Directory

• Prerequisite: Synthesizing a Platform

• Command:

  cmd) cd #(platform dir)
  cmd) make #(FPGA name) // i.e., make arty-100t

• Result:
  #(platform dir)/imp_#(FPGA name)_#(date) is created,
  which we refer to as #(fpga dir).

• Note: #(fpga dir) is automatically managed by the RVX tool.

Creating a Vivado Project

• Command:

  cmd) cd #(fpga dir)
  cmd) make project

Generating an FPGA Bitstream

• Included Process: Creating a Vivado Project

• Command:

  cmd) cd #(fpga dir)
  cmd) make imp

• Result:
  A bitstream and reports are generated in the #(fpga dir)/imp_result directory.

Cleaning All Vivado Results

cmd) cd #(fpga dir)
cmd) make clean

Validating Functionality

For the following functionalities, you must power on the FPGA board and connect it to your computer.

Programming the FPGA with the Generated Bitstream

• Prerequisite: Generating an FPGA Bitstream

• Command:

  cmd) cd #(fpga dir)
  cmd) make program

Opening the Terminal to View printf Output

• Prerequisite: Programming the FPGA with the Generated Bitstream

Command @ Linux

cmd) cd #(fpga dir)
cmd) make printf

Command @ Windows

cmd) cd #(fpga dir)
cmd) make printf
> Device Manager and PuTTY will be launched.
inst) Check the USB Serial Port number in Device Manager.
> In Figure 1, the port number is COM8.
inst) On PuTTY, configure the settings as highlighted by the three red boxes in Figure 1.
> If you save the session, you can reuse these settings later.
inst) Open

Running an Application on the FPGA Prototype

Common

• Prerequisite:

  • Developing an Application

  • Programming the FPGA with the Generated Bitstream

  • Opening the Terminal to View printf Output

• Note:

  • Build compiles only the parts that have changed.

Running an Application

• Included Process:

  • Building an Application with BUILD_MODE=debug

cmd) cd #(fpga dir)
cmd) make #(app name).run

Running an Application with a Rebuild

• Included Process:

  • Cleaning Build Results

  • Building an Application with BUILD_MODE=debug

cmd) cd #(fpga dir)
cmd) make #(app name).rerun

Running an Application with Optimization

• Included Process:

  • Building an Application with BUILD_MODE=release

cmd) cd #(fpga dir)
cmd) make #(app name).opt

Running an Optimized Application with a Rebuild

• Included Process:

  • Cleaning Build Results

  • Building an Application with BUILD_MODE=release

cmd) cd #(fpga dir)
cmd) make #(app name).reopt

Running an Application with Profiling

• Included Process:

  • Cleaning Build Results

  • Building an Application with BUILD_MODE=profile

cmd) cd #(fpga dir)
cmd) make #(app name).profile

Auxiliary Functionality

Open a Vivado Project

• Prerequisite: Creating a Vivado Project

• Command:

  cmd) cd #(fpga dir)
  cmd) make open_project

Displaying Available FPGA List

cmd) cd #(platform dir)
cmd) make fpga_list

Displaying Applications List

cmd) cd #(fpga dir)
cmd) make app_list

Deleting All Prototyping Directories

cmd) cd #(platform dir)
cmd) make clean_imp

Enabling Keyboard Input in Minicom

cmd) sudo minicom -s
inst) Select “Serial port setup”.
inst) Configure the settings as shown in Figure 2.

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